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      VHDL/Verilog
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38 projects in result set. Projects sorted by: Ranking (Top Ranked First)
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1. A UPF script 2 CPF script converter - upf2cpf is a cool command line tool which will takes in a UPF(Unified Power Format) and will convert it to a CPF(Common Power Format).This tool is very useful for Chip Design Engineers, who want to feed the power related info about the RTL in UPF/CPF.

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2. accellera-vip-interop-library - This library supports interoperability between components written for different verification methodologies such as VMM and OVM. This is maintained by the Accellera Verification Intellectual Property Technical Subcommittee.

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3. Blowfish VHDL Core - BlowfishVHDL - free fully synthesizable Blowfish encryption algorithm hardware implementation.

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4. Cereon - A new 64-bit RISC platform, complemented by a set of development tools, standards specifications and synthesizable VHDL implementations.

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5. CPUptodate - a micro processor 16 bits optimized to hold in a CPLD

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6. Custom Architecture Generator Tool - Custom Architecture Generator Tool is a software based on the Netbeans Platform, the main purpose is to accelerate the embedded system realisation with a high level description: VHDL code,C2VHDL conversion,Quartus project generation,real time application

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7. elphel-community - This is a fork of the Elphel cameras firmware CVS, fully open to contributions from the elphel users and developers community Everyone can submit patches or obtain CVS access for this fork Stable changes will be ported to the main CVS upon approv

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8. Engineering tools on OSX - A collection of useful software packages to perform engineering tasks, especially electrical engineering and chip design. All packages come as shrink-wrapped installers for Apple's Mac OS X.

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9. eWave - Digital waveform viewer/editor. eWave is a visual waveform timing editor compatible with VCD format (with image export possibilities) intended to be used in educational or technological (digital design) purposes. It is distributed as an Eclipse plugin.

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10. FPGADES - This is a simple DES algorithm implemented in FPGA platform. Mainly this system was written by C and interpreted into VHDL.

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11. Free tools and cores for FPGAs - Tools for FPGA development and IP cores. This project provides tools, cores and documentation to develope FPGA applications. The project focuses on VHDL.

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12. FreeCores - FreeCores is a project to provide and foster a place for the sharing and development of hardware designs, in the spirit of freedom, starting with all the Free Hardware cores moved from OpenCores.org, and indexed at FreeCores.org.

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13. Grido - An implementation of neural graphs

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14. GXSM - A multi-channel image and vector-probe data acquisition and visualization system designed for SPM techniques (STM,AFM..), but also SPA-LEED. A plug-in interface allows any user add-on data-processing and special hardware and instrument support.

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15. Icarus Verilog - Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.

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16. Inferno C++ to Verilog - Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.

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17. inter-software interface snippets - xswifs stands for: cross SoftWare Interfaces. This project provide examples (snippets) for interfacing various software tools and languages with various mechanism. It has been created to help in HW/SW co-simulation and to provide benchmarks.

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18. JPEG Hardware Compressor / Encoder - This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, at a rate of up to 24 images per second (on FPGA Xilinx XC2V1000-4 @ 40 MHz with res. 352x288). License: GPL, that is valid only for NO

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19. Mextram in Verilog-A - Verilog-A Implementation of the Mextram Bipolar Transistor Model

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20. Open WebServo - OpenWebServo is an Open Source Hardware and Software project. Its main goal is to develop a web-controlled servo system. The project includes web application, firmware and hardware design.

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21. openciphers - This project is a collection of Open Source crypto cores and implementations relating to high speed cryptanalysis/cracking and complex implementations.

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22. OpenJTAG - Software to support the JTAG bus (IEEE 1149.1). Primary purpose is for a JTAG programmer/debugger using FPGA's to provide ability to test and program JTAG devices.

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23. OpenSourceGym - A software package that will combine different embedded computing platforms with home exercise equipment and a Qt client program in order to provide tracking of health and exercise performance.

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24. OpenVGA - OpenVGA is an free and open FPGA-based implementation of a VGA compatible graphics adapter, and utilising low-cost hardware. The project includes the PCB schematic and artwork, Verilog HDL, firmware assembly code, and driver source code.

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25. OpenWi - Design and implementation of silicon and software for baseband processors conforming to IEEE wireless standards. Initial focus on WiMAX and WiFi.

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26. OS561/Minon/Kodek - The OS561 operating system based around FORTH/Java. The OS is to run on a VHDL chip OpenHardware design called the Minon, but could become available for other platforms. The unique point of the design is a revolutionary data compression technology.

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27. Pulse Programmer - A programmable signal generator and RF synthesizer for scientific experiments, especially quantum computing and quantum information processing. It includes hardware, firmware, software, and documentation, all under an open source license.

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28. RTUCR - A Verilog design for a simple ASIC that executes the Ray Tracing Algorithm.

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29. shelley - SHELLEY Software HardwarE Light LanguagE Yep !

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30. skol - Spartan3A Starter Kit Oscilloscope with Java Client

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31. SystemC Logic Analyzer - HW(VHDL) and SW of logic analyzer and On-Chip-Verification(OCV) for Value Change Dump(VCD) file format that exported to seemd SystemC ,ModelSIM, and many other EDA tools. Very easy and Simple.

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32. The SBus (Synergy Bus) Project - The SBus is a family of high-speed packet-based databus standards, suitable for both networking and interdevice communication. They are optimized for high data density transactions. This project creates and documents the standards, schematics, and driver

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33. Verilog Perl - The Verilog-Perl distribution provides Perl preprocessing, parsing and utilities for the Verilog Language. It is also available from CPAN under the Verilog:: namespace.

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34. Verilog Tool Framework - vrq is verilog parser that supports plugin tools to process verilog. Current plugins include tools to perform x-propagation and to auto build hiearchy.

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35. VeriWell Verilog Simulator - VeriWell is a full Verilog simulator. It supports nearly all of the IEEE1364-1995 standard, as well as PLI 1.0. Yes, VeriWell *is* the same simulator that was sold by Wellspring Solutions in the mid-1990 and was included with the Thomas and Moorby book

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36. VHDL Symbolic Simulator - VSYML is an automated symbolic simulator for VHDL designs.

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37. VHDL Test Processor - Writing Testbenches for FPGA/ASIC design is always a very fastidious and boring task. This project helps any FPGA/ASIC designer by providing a full RTL test environment with C support.

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38. vMAGIC - vMAGIC is an Java-API which helps creating VHDL generators and analyzers. vMAGIC comprises of three parts: 1st a VHDL'93 compliant parser, 2nd a programming model to easily create and modify VHDL constructs and 3rd a VHDL Writer to generate code.

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38 projects in result set. Projects sorted by: Ranking (Top Ranked First)
Select a page:   1

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